LIBRARY ieee ;
USE ieee.std_logic_1164.all ;

PACKAGE p_stop_watch IS

	COMPONENT counter IS
	PORT(	clk: IN STD_LOGIC;
			reset: IN STD_LOGIC;
			y: OUT INTEGER);
	END COMPONENT;
	
	COMPONENT regis IS
	PORT(	inp: IN INTEGER;
			store: IN STD_LOGIC;
			reg: OUT INTEGER);
	END COMPONENT;
		
END p_stop_watch;

